Multi-Net Optimization of VLSI Interconnect

Name: Multi-Net Optimization of VLSI Interconnect
Author: Konstantin Moiseev

Specificaties

Paperback, blz. | Engels

Springer New York | e druk, 2016

ISBN13: 9781493942626

Rubricering

Juridisch :

Springer New York e druk, 2016 9781493942626

€ 108,99

In winkelwagen

Levertijd ongeveer 9 werkdagen

Gratis verzonden

Samenvatting

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

Specificaties

ISBN13:9781493942626

Taal:Engels

Bindwijze:paperback

Uitgever:Springer New York

Inhoudsopgave

<p>An Overview of the VLSI Interconnect Problem.- Interconnect Aspects in Design Methodology and EDA Tools.- Scaling Dependent Electrical Modeling of Interconnects.- Net-by-Net Wire Optimization.- Multi-Net Sizing and Spacing of Bundle Wires.- Multi-net Sizing and Spacing in General Layouts.- Interconnect Optimization by Net Ordering.- Layout Migration.- Future Directions in Interconnect Optimization. </p><p>

Het is boekenweek! Tot en met 22 maart krijgt u Piaggio cadeau bij uw bestelling. Bij besteding van tenminste €17,50 aan Nederlandstalige boeken

Uw winkelwagen

Multi-Net Optimization of VLSI Interconnect

Samenvatting

Specificaties

Inhoudsopgave

Net verschenen

Rubrieken

Personen

Trefwoorden