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Digital Electronics: Sequential and Arithmetic Log ic Circuits

Sequential and Arithmetic Logic Circuits

Specificaties
Gebonden, 336 blz. | Engels
John Wiley & Sons | e druk, 2016
ISBN13: 9781848219854
Rubricering
Juridisch :
John Wiley & Sons e druk, 2016 9781848219854
Verwachte levertijd ongeveer 9 werkdagen

Samenvatting

As electronic devices become increasingly prevalent in everyday life, digital circuits are becoming even more complex and smaller in size. This book presents the basic principles of digital electronics in an accessible manner, allowing the reader to grasp the principles of combinational and sequential logic and the underlying techniques for the analysis and design of digital circuits. Providing a hands–on approach, this work introduces techniques and methods for establishing logic equations and designing and analyzing digital circuits. Each chapter is supplemented with practical examples and well–designed exercises with worked solutions.

This second of three volumes focuses on sequential and arithmetic logic circuits. It covers various aspects related to the following topics: latch and flip–flop; binary counters; shift registers; arithmetic and logic circuits; digital integrated circuit technology; semiconductor memory; programmable logic circuits.

Along with the two accompanying volumes, this book is an indispensable tool for students at a bachelors or masters level seeking to improve their understanding of digital electronics, and is detailed enough to serve as a reference for electronic, automation and computer engineers.

Specificaties

ISBN13:9781848219854
Taal:Engels
Bindwijze:gebonden
Aantal pagina's:336

Inhoudsopgave

<p>Preface ix</p>
<p>Chapter 1. Latch and Flip–Flop 1</p>
<p>1.1. Introduction&nbsp; 1</p>
<p>1.2. General overview 1</p>
<p>1.2.1. SR latch 6</p>
<p>1.2.2. S R latch&nbsp; 9</p>
<p>1.2.3. Application: switch debouncing 11</p>
<p>1.3. Gated SR latch 11</p>
<p>1.3.1. Implementation based on an SR latch&nbsp; 12</p>
<p>1.3.2. Implementation based on an S R latch 14</p>
<p>1.4. Gated D latch&nbsp; 15</p>
<p>1.5. Basic JK flip–flop 16</p>
<p>1.6. T flip–flop&nbsp; 18</p>
<p>1.7. Master–slave and edge–triggered flip–flop&nbsp; 20</p>
<p>1.7.1. Master–slave flip–flop 20</p>
<p>1.7.2. Edge–triggered flip–flop&nbsp; 24</p>
<p>1.8. Flip–flops with asynchronous inputs 30</p>
<p>1.9. Operational characteristics of flip–flops 33</p>
<p>1.10. Exercises 34</p>
<p>1.11. Solutions 39</p>
<p>Chapter 2. Binary Counters&nbsp; 51</p>
<p>2.1. Introduction&nbsp; 51</p>
<p>2.2. Modulo 4 counter 52</p>
<p>2.3. Modulo 8 counter 53</p>
<p>2.4. Modulo 16 counter&nbsp; 55</p>
<p>2.4.1. Modulo 10 counter&nbsp; 57</p>
<p>2.5. Counter with parallel load&nbsp; 60</p>
<p>2.6. Down counter 62</p>
<p>2.7. Synchronous reversible counter 64</p>
<p>2.8. Decoding a down counter 65</p>
<p>2.9. Exercises&nbsp; 66</p>
<p>2.10. Solutions 73</p>
<p>Chapter 3. Shift Register 85</p>
<p>3.1. Introduction&nbsp; 85</p>
<p>3.2. Serial–in shift register 85</p>
<p>3.3. Parallel–in shift register&nbsp; 85</p>
<p>3.4. Bidirectional shift register&nbsp; 88</p>
<p>3.5. Register file 90</p>
<p>3.6. Shift register based counter&nbsp; 91</p>
<p>3.6.1. Ring counter&nbsp; 92</p>
<p>3.6.2. Johnson counter&nbsp; 93</p>
<p>3.6.3. Linear feedback counter 94</p>
<p>3.7. Exercises&nbsp; 101</p>
<p>3.8. Solutions&nbsp; 107</p>
<p>Chapter 4. Arithmetic and Logic Circuits 117</p>
<p>4.1. Introduction&nbsp; 117</p>
<p>4.2. Adder&nbsp; 117</p>
<p>4.2.1. Half adder 117</p>
<p>4.2.2. Full adder&nbsp; 119</p>
<p>4.2.3. Ripple–carry adder 120</p>
<p>4.2.4. Carry–lookahead adder&nbsp; 122</p>
<p>4.2.5. Carry–select adder 124</p>
<p>4.2.6. Carry–skip adder&nbsp; 125</p>
<p>4.3. Comparator 127</p>
<p>4.4. Arithmetic and logic unit 129</p>
<p>4.5. Multiplier&nbsp; 136</p>
<p>4.5.1. Multiplier of 2–bit unsigned numbers&nbsp; 136</p>
<p>4.5.2. Multiplier of 4–bit unsigned numbers&nbsp; 137</p>
<p>4.5.3. Multiplier for signed numbers&nbsp; 138</p>
<p>4.6. Divider 143</p>
<p>4.7. Exercises&nbsp; 149</p>
<p>4.8. Solutions&nbsp; 158</p>
<p>Chapter 5. Digital Integrated Circuit Technology&nbsp; 177</p>
<p>5.1. Introduction 177</p>
<p>5.2. Characteristics of the technologies&nbsp; 177</p>
<p>5.2.1. Supply voltage 177</p>
<p>5.2.2. Logic levels&nbsp; 178</p>
<p>5.2.3. Immunity to noise 178</p>
<p>5.2.4. Propagation delay 179</p>
<p>5.2.5. Electric power consumption 179</p>
<p>5.2.6. Fan–out or load factor 179</p>
<p>5.3. TTL logic family&nbsp; 180</p>
<p>5.3.1. Bipolar junction transistor&nbsp; 180</p>
<p>5.3.2. TTL NAND gate&nbsp; 181</p>
<p>5.3.3. Integrated TTL circuit 182</p>
<p>5.4. CMOS logic family&nbsp; 183</p>
<p>5.4.1. MOSFET transistor&nbsp; 183</p>
<p>5.4.2. CMOS logic gates 184</p>
<p>5.5. Open drain logic gates 185</p>
<p>5.5.1. Three–state buffer 187</p>
<p>5.5.2. CMOS integrated circuit 188</p>
<p>5.6. Other logic families&nbsp; 189</p>
<p>5.7. Interfacing circuits of different technologies&nbsp; 189</p>
<p>5.8. Exercises&nbsp; 190</p>
<p>5.9. Solutions&nbsp; 193</p>
<p>Chapter 6. Semiconductor Memory&nbsp; 195</p>
<p>6.1. Introduction&nbsp; 195</p>
<p>6.2. Memory organization 195</p>
<p>6.3. Operation of a memory&nbsp; 197</p>
<p>6.4. Types of memory 199</p>
<p>6.4.1. Non–volatile memory 199</p>
<p>6.4.2. Volatile memories 202</p>
<p>6.4.3. Characteristics of the different memory types 207</p>
<p>6.5. Applications&nbsp; 207</p>
<p>6.5.1. Memory organization 208</p>
<p>6.5.2. Applications&nbsp; 209</p>
<p>6.6. Other types of memory&nbsp; 218</p>
<p>6.6.1. Ferromagnetic RAM 220</p>
<p>6.6.2. Content–addressable memory 222</p>
<p>6.6.3. Sequential access memory&nbsp; 223</p>
<p>6.7. Exercises&nbsp; 226</p>
<p>6.8. Solutions&nbsp; 230</p>
<p>Chapter 7. Programmable Logic Circuits 245</p>
<p>7.1. General overview 245</p>
<p>7.2. Programmable logic device&nbsp; 246</p>
<p>7.3. Applications&nbsp; 255</p>
<p>7.3.1. Implementation of logic functions&nbsp; 255</p>
<p>7.3.2. Two–bit adder 257</p>
<p>7.3.3. Binary–to–BCD and BCD–to–binary converters 263</p>
<p>7.4. Programmable logic circuits (CPLD and FPGA)&nbsp; 263</p>
<p>7.4.1. Principle and technology 264</p>
<p>7.4.2. CPLD&nbsp; 268</p>
<p>7.4.3. FPGA&nbsp; 270</p>
<p>7.5. References 274</p>
<p>7.6. Exercises&nbsp; 275</p>
<p>7.7. Solutions&nbsp; 284</p>
<p>Appendix&nbsp; 307</p>
<p>Bibliography 309</p>
<p>Index&nbsp; 311</p>

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        Digital Electronics: Sequential and Arithmetic Log ic Circuits