VLSI Design: Circuits, Systems and Applications

Front-End CMOS Circuit for Low Power Consumption.- A Preliminary Study of Oscillators, Phase and Frequency Detector and Charge Pump for Phase Locked Loop (PLL) Applications.- All Digital RF Transmitter with Highly Power Efficient Doherty Power Amplifier.- Adiabatic Techniques for Energy Efficient Barrel Shifter Design.- A 79Ghz CMOS LNA with Adaptive Biasing.- X-Band Phased-Array Transmitter in 180nm Sige Bicmos Technology with Stacked Power Amplifier.- Short Range Low Data Rate Pulsed UWB Transmitter.- A New High Speed Multiplier Based on Carry Look Ahead Adder and Compressor.- Real-Time Automatic Peaks and Onsets Detection of Photoplethysmographic Signals.- Survey on Design of Low Power CMOS Four Quadrant Analog Multiplier in Nano-Meter Scaling.- Designing 5t Embedded Dram Cell for Ultra Low Power Low Voltage Applications Based on Schmitt Trigger.- Design and Implementation of Multi-Bit Self-Checking Carry-Select Adder.- A Novel Adiabatic Logic for Low Power VLSI Circuit Design and Power Optimization Using Finfet.- Test Signal Generation for Detecting Faults On Mil-Std 1553 Bus.- Design of Ultra Low Voltage- Energy Efficient Hybrid Full Adder Circuit.- Mtcmos Based Soft Start Circuit for Low Leakage Led Driver with Minimum In-Rush Current.- Implementation of Dual-Hysteresis Mode Flip-Flop Multivibrator    Using Differential Voltage Current Conveyor.- High Performance Domino Logic Circuit Design By Contention Reduction.- Differential Power Analysis (Dpa) Resistant Cryptographic S-Box.- Implementation of Radix-2 Butterfly Using Distributed Arithmatic Algorithm (Daa).- An Area Efficient Design of Warped Filters.- Design of Arithmetic and Logical Unit (Alu) Using Subthreshold Adiabatic Logic for Low Power Application.- Design of Sample and Hold for High Speed Analog To Digital Converter.- Fpga Masked S-Box Implementation for Aes Engine.- Pipelined and Parallel Architecture of Reversible Watermarking for Grayscale Images.- Design and Verification of Amba Axi3 Protocol.- Design of Multi-Stage Cmos Ota for Low-Power and High Driving Capability.<p></p><p></p><p></p>